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TIS-100

TIS-100

Tessellated Intelligence System

System details

Massively parallel computer architecture comprised of non-uniformly interconnected heterogeneous nodes

Node Type T21 - Basic Execution Node

TIS-100 Registers

| Register | Notes | |———-|——————————————————| | ACC | Accumulator register. | | BAK | Non-addressible temporary storage for values in ACC. |

TIS-100 Ports

| Port | Notes | |———————–|——————————————————————————————————————————–| | LEFT, RIGHT, UP, DOWN | Communication register for topologically adjacent nodes. Blocks indefinitely if used until transaction with other node occurs. | | ANY | Reads or writes a value that becomes available on ANY port. (TODO - deterministic which node reads ANY value first?) | | LAST | Refers to the port last read or written using the ANY pseudo-port. |

TIS-100 Instructions

Instruction Description
NOP pseudo-intruction converted to ADD NIL.
MOV , SRC is read and written to DST.
SWP Exchange ACC and BAK.
SAV Write ACC to BAK.
ADD Add SRC to ACC, store result in ACC. (TODO - overflow behaviour?)
SUB Subtract SRC from ACC, store result in ACC. (TODO - underflow behaviour?)
NEG The value of ACC is arithmetically negated. Zero remains the same.
JMP Transfer execution to instruction after LABEL.
JEZ Transfer execution to instruction after LABEL if value of ACC is zero.
JNZ Transfer execution to instruction after LABEL if value of ACC is not zero.
JGZ Transfer execution to instruction after LABEL if value of ACC is greater than zero.
JLZ Transfer execution to instruction after LABEL if value of ACC is less than zero.
JRO Transfer execution to instruction at offset specified by SRC relative to current instruction.
HCF Halt and Catch Fire (undocumented)

Node Type T30 - Stack Memory Node

Node Type T31 - Random Access Memory Node

Debugger

Visualization Module